| An Intel 8085AH processor. | |
| Produced | From 1977 to 1990s |
|---|---|
| Common manufacturer(s) | Intel and several others |
| Max. CPU clock | 3,5 and 6 MHz |
| Instruction set | pre x86 |
| Package(s) | 40 pin DIP |
Instructions can be categorized according to their method of addressing the hardware registers and/or memory.
Implied Addressing:
The addressing mode of certain instructions is implied by the instruction’s function. For example, the STC (set carry flag) instruction deals only with the carry flag, the DAA (decimal adjust accumulator) instruction deals with the accumulator.
Register Addressing:
Quite a large set of instructions call for register addressing. With these instructions, you must specify one of the registers A through E, H or L as well as the operation code. With these instructions, the accumulator is implied as a second operand. For example, the instruction CMP E may be interpreted as 'compare the contents of the E register with the contents of the accumulator.
Most of the instructions that use register addressing deal with
8-bit values. However, a few of these instructions deal with 16-bit register pairs. For example, the PCHL instruction exchanges the contents of the program counter with the contents of the H and L registers.
Immediate Addressing:
Instructions that use immediate addressing have data assembled as a part of the instruction itself. For example, the instruction CPI 'C' may be interpreted as ‘compare the contents of the accumulator with the letter C. When assembled, this instruction has the hexadecimal value FE43. Hexadecimal 43 is the internal representation for the letter C. When this instruction is executed, the processor fetches the first instruction byte and determines that it must fetch one more byte. The processor fetches the next byte into one of its internal registers and then performs the compare operation.
Notice that the names of the immediate instructions indicate that they use immediate data. Thus, the name of an add instruction is ADD; the name of an add immediate instruction is ADI.
All but two of the immediate instructions uses the accumulator as an implied operand, as in the CPI instruction shown previously. The MVI (move immediate) instruction can move its immediate data to any of the working registers including the accumulator or to memory. Thus, the instruction MVI D, OFFH moves the hexadecimal
value FF to the D register.
The LXI instruction (load register pair immediate) is even more unusual in that its immediate data is a 16-bit value. This instruction is commonly used to load addresses into a register pair. As mentioned previously, your program must initialize the stack pointer; LXI is the instruction most commonly used for this purpose. For example, the instruction LXI SP,3OFFH loads the stack pointer with the hexadecimal value 30FF.
Direct Addressing:
Jump instructions include a 16-bit address as part of the instruction. For example, the instruction JMP 1000H causes a jump to the hexadecimal address 1000 by replacing the current contents of the program counter with the new value 1000H.
Instructions that include a direct address require three bytes of storage: one for the instruction code, and two for the 16-bit address
Register Indirect Addressing:
Register indirect instructions reference memory via a register pair. Thus, the instruction MOV M,C moves the contents of the C register into the memory address stored in the H and L register pair. The instruction LDAX B loads the accumulator with the byte of data specified by the address in the B and C register pair.
Combined Addressing Modes:
Some instructions use a combination of addressing modes. A CALL instruction, for example, combines direct addressing and register indirect addressing. The direct address in a CALL instruction specifies the address of the desired subroutine; the register indirect address is the stack pointer. The CALL instruction pushes the current contents of the program counter into the memory location specified by the stack pointer.
Timing Effects of Addressing Modes:
Addressing modes affect both the amount of time required for executing an instruction and the amount of memory required for its storage. For example, instructions that use implied or register addressing, execute very quickly since they deal directly with the processor’s hardware or with data already present in hardware registers. Most important, however is that the entire instruction can be fetched with a single memory access. The number of memory accesses required is the single greatest factor in determining execution timing. More memory accesses therefore require more execution time. A CALL instruction for example, requires five memory accesses: three to access the entire instruction and two more to push the contents of the program counter onto the stack.
The processor can access memory once during each processor cycle. Each cycle comprises a variable number of states. (See below and the appendix of “USING THE SDK-85 MICROPROCESSOR TRAINER”). The length of a state depends on the clock frequency specified for your system, and may range from 480 nanoseconds to 2 microseconds. Thus, the timing for a four state instruction may range from 1.920 microseconds through 8 microseconds. (The 8085 have a maximum clock frequency of 5 MHz and therefore a minimum state length of 200 nanoseconds.)
Instruction Naming Conventions:
The mnemonics assigned to the instructions are designed to indicate the function of the instruction. The instructions fall into the following functional categories:
Data Transfer Croup:
The data transfer instructions move data between registers or between memory and registers.
MOV Move
MVI Move Immediate
LDA Load Accumulator Directly from Memory
STA Store Accumulator Directly in Memory
LHLD Load H & L Registers Directly from Memory
SHLD Store H & L Registers Directly in Memory
An 'X' in the name of a data transfer instruction implies that it deals with a register pair (16-bits);
LXI Load Register Pair with Immediate data
LDAX Load Accumulator from Address in Register Pair
STAX Store Accumulator in Address in Register Pair
XCHG Exchange H & L with D & E
XTHL Exchange Top of Stack with H & L
Arithmetic Group:
The arithmetic instructions add, subtract, increment, or decrement data in registers or memory.
ADD Add to Accumulator
ADI Add Immediate Data to Accumulator
ADC Add to Accumulator Using Carry Flag
ACI Add Immediate data to Accumulator Using Carry
SUB Subtract from Accumulator
SUI Subtract Immediate Data from Accumulator
SBB Subtract from Accumulator Using Borrow (Carry) Flag
SBI Subtract Immediate from Accumulator Using Borrow (Carry) Flag
INR Increment Specified Byte by One
DCR Decrement Specified Byte by One
INX Increment Register Pair by One
DCX Decrement Register Pair by One
DAD Double Register Add; Add Content of Register
Pair to H & L Register Pair
Logical Group:
This group performs logical (Boolean) operations on data in registers and memory and on condition flags.
The logical AND, OR, and Exclusive OR instructions enable you to set specific bits in the accumulator ON or OFF.
ANA Logical AND with Accumulator
ANI Logical AND with Accumulator Using Immediate Data
ORA Logical OR with Accumulator
OR Logical OR with Accumulator Using Immediate Data
XRA Exclusive Logical OR with Accumulator
XRI Exclusive OR Using Immediate Data
The Compare instructions compare the content of an 8-bit value with the contents of the accumulator;
CMP Compare
CPI Compare Using Immediate Data
The rotate instructions shift the contents of the accumulator one bit position to the left or right:
RLC Rotate Accumulator Left
RRC Rotate Accumulator Right
RAL Rotate Left Through Carry
RAR Rotate Right Through Carry
Complement and carry flag instructions:
CMA Complement Accumulator
CMC Complement Carry Flag
STC Set Carry Flag
Branch Group:
The branching instructions alter normal sequential program flow, either unconditionally or conditionally. The unconditional branching instructions are as follows:
JMP Jump
CALL Call
RET Return
Conditional branching instructions examine the status of one of four condition flags to determine whether the specified branch is to be executed. The conditions that may be specified are as follows:
NZ Not Zero (Z = 0)
Z Zero (Z = 1)
NC No Carry (C = 0)
C Carry (C = 1)
PO Parity Odd (P = 0)
PE Parity Even (P = 1)
P Plus (S = 0)
M Minus (S = 1)
Thus, the conditional branching instructions are specified as follows:
Jumps Calls Returns
C CC RC (Carry)
INC CNC RNC (No Carry)
JZ CZ RZ (Zero)
JNZ CNZ RNZ (Not Zero)
JP CP RP (Plus)
JM CM RM (Minus)
JPE CPE RPE (Parity Even)
JP0 CPO RPO (Parity Odd)
Two other instructions can affect a branch by replacing the contents or the program counter:
PCHL Move H & L to Program Counter
RST Special Restart Instruction Used
with Interrupts
Stack I/O, and Machine Control Instructions:
The following instructions affect the Stack and/or Stack Pointer:
PUSH Push Two bytes of Data onto the Stack
POP Pop Two Bytes of Data off the Stack
XTHL Exchange Top of Stack with H & L
SPHL Move content of H & L to Stack Pointer
The I/0 instructions are as follows:
IN Initiate Input Operation
OUT Initiate Output Operation
THE 8085 PROGRAMMING MODEL
In the previous tutorial we described the 8085 microprocessor registers in reference to the internal data operations. The same information is repeated here briefly to provide the continuity and the context to the instruction set and to enable the readers who prefer to focus initially on the programming aspect of the microprocessor.
The 8085 programming model includes six registers, one accumulator, and one flag register, as shown in Figure. In addition, it has two 16-bit registers: the stack pointer and the program counter. They are described briefly as follows.
REGISTERS
The 8085 has six general-purpose registers to store 8-bit data; these are identified as B,C,D,E,H, and L as shown in the figure. They can be combined as register pairs - BC, DE, and HL - to perform some 16-bit operations. The programmer can use these registers to store or copy data into the registers by using data copy instructions.
ACCUMULATOR
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This register is used to store 8-bit data and to perform arithmetic and logical operations. The result of an operation is stored in the accumulator. The accumulator is also identified as register A.
FLAGS
The ALU includes five flip-flops, which are set or reset after an operation according to data conditions of the result in the accumulator and other registers. They are called Zero(Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags; their bit positions in the flag register are shown in the Figure below. The most commonly used flags are Zero, Carry, and Sign. The microprocessor uses these flags to test data conditions.
For example, after an addition of two numbers, if the sum in the accumulator id larger than eight bits, the flip-flop uses to indicate a carry -- called the Carry flag (CY) -- is set to one. When an arithmetic operation results in zero, the flip-flop called the Zero(Z) flag is set to one. The first Figure shows an 8-bit register, called the flag register, adjacent to the accumulator. However, it is not used as a register; five bit positions out of eight are used to store the outputs of the five flip-flops. The flags are stored in the 8-bit register so that the programmer can examine these flags (data conditions) by accessing the register through an instruction.
These flags have critical importance in the decision-making process of the micro- processor. The conditions (set or reset) of the flags are tested through the software instructions. For example, the instruction JC (Jump on Carry) is implemented to change the sequence of a program when CY flag is set. The thorough understanding of flag is essential in writing assembly language programs.
PROGRAM COUNTER (PC)
This 16-bit register deals with sequencing the execution of instructions. This register is a memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit register.
The microprocessor uses this register to sequence the execution of the instructions. The function of the program counter is to point to the memory address from which the next byte is to be fetched. When a byte (machine code) is being fetched, the program counter is incremented by one to point to the next memory location
STACK POINTER (SP)
The stack pointer is also a 16-bit register used as a memory pointer. It points to a memory location in R/W memory, called the stack. The beginning of the stack is defined by loading 16-bit address in the stack pointer.
This programming model will be used in subsequent tutorials to examine how these registers are affected after the execution of an instruction.
THE 8085 ADDRESSING MODES
The instructions MOV B, A or MVI A, 82H are to copy data from a source into a destination. In these instructions the source can be a register, an input port, or an 8-bit number (00H to FFH). Similarly, a destination can be a register or an output port. The sources and destination are operands. The various formats for specifying operands are called the ADDRESSING MODES. For 8085, they are:
1. Immediate addressing.
2. Register addressing.
3. Direct addressing.
4. Indirect addressing.
Immediate addressing
Data is present in the instruction. Load the immediate data to the destination provided.
Example: MVI R,data
Register addressing
Data is provided through the registers.
Example: MOV Rd, Rs
Direct addressing
Used to accept data from outside devices to store in the accumulator or send the data stored in the accumulator to the outside device. Accept the data from the port 00H and store them into the accumulator or Send the data from the accumulator to the port 01H.
Example: IN 00H or OUT 01H
Indirect Addressing
This means that the Effective Address is calculated by the processor. And the contents of the address (and the one following) is used to form a second address. The second address is where the data is stored. Note that this requires several memory accesses; two accesses to retrieve the 16-bit address and a further access (or accesses) to retrieve the data which is to be loaded into the register.
INSTRUCTION CLASSIFICATION
An instruction is a binary pattern designed inside a microprocessor to perform a specific function. The entire group of instructions, called the instruction set, determines what functions the microprocessor can perform. These instructions can be classified into the following five functional categories: data transfer (copy) operations, arithmetic operations, logical operations, branching operations, and machine-control operations.
DATA TRANSFER (COPY) OPERATIONS
This group of instructions copy data from a location called a source to another location called a destination, without modifying the contents of the source. In technical manuals, the term data transfer is used for this copying function. However, the term transfer is misleading; it creates the impression that the contents of the source are destroyed when, in fact, the contents are retained without any modification. The various types of data transfer (copy) are listed below together with examples of each type:
|
Types |
Examples |
|
1. Between Registers. |
1. Copy the contents of the register B into register D. |
|
2. Specific data byte to a register or a memory location. |
2. Load register B with the data byte 32H. |
|
3. Between a memory location and a register. |
3. From a memory location 2000H to register B. |
| 4. Between an I/O device and the accumulator. |
4.From an input keyboard to the accumulator. |
ARITHMETIC OPERATIONS
These instructions perform arithmetic operations such as addition, subtraction, increment, and decrement.
Addition - Any 8-bit number, or the contents of a register or the contents of a memory location can be added to the contents of the accumulator and the sum is stored in the accumulator. No two other 8-bit registers can be added directly (e.g., the contents of register B cannot be added directly to the contents of the register C). The instruction DAD is an exception; it adds 16-bit data directly in register pairs.
Subtraction - Any 8-bit number, or the contents of a register, or the contents of a memory location can be subtracted from the contents of the accumulator and the results stored in the accumulator. The subtraction is performed in 2's compliment, and the results if negative, are expressed in 2's complement. No two other registers can be subtracted directly.
Increment/Decrement - The 8-bit contents of a register or a memory location can be incremented or decrement by 1. Similarly, the 16-bit contents of a register pair (such as BC) can be incremented or decrement by 1. These increment and decrement operations differ from addition and subtraction in an important way; i.e., they can be performed in any one of the registers or in a memory location.
LOGICAL OPERATIONS
These instructions perform various logical operations with the contents of the accumulator.
AND, OR Exclusive-OR - Any 8-bit number, or the contents of a register, or of a memory location can be logically ANDed, Ored, or Exclusive-ORed with the contents of the accumulator. The results are stored in the accumulator.
Rotate- Each bit in the accumulator can be shifted either left or right to the next position.
Compare- Any 8-bit number, or the contents of a register, or a memory location can be compared for equality, greater than, or less than, with the contents of the accumulator.
Complement - The contents of the accumulator can be complemented. All 0s are replaced by 1s and all 1s are replaced by 0s.
BRANCHING OPERATIONS
This group of instructions alters the sequence of program execution either conditionally or unconditionally.
Jump - Conditional jumps are an important aspect of the decision-making process in the programming. These instructions test for a certain conditions (e.g., Zero or Carry flag) and alter the program sequence when the condition is met. In addition, the instruction set includes an instruction called unconditional jump.
Call, Return, and Restart - These instructions change the sequence of a program either by calling a subroutine or returning from a subroutine. The conditional Call and Return instructions also can test condition flags.
MACHINE CONTROL OPERATIONS
These instructions control machine functions such as Halt, Interrupt, or do nothing.
The microprocessor operations related to data manipulation can be summarized in four functions:
Some important aspects of the instruction set are noted below:
INSTRUCTION FORMAT
An instruction is a command to the microprocessor to perform a given task on a specified data. Each instruction has two parts: one is task to be performed, called the operation code (opcode), and the second is the data to be operated on, called the operand. The operand (or data) can be specified in various ways. It may include 8-bit (or 16-bit ) data, an internal register, a memory location, or 8-bit (or 16-bit) address. In some instructions, the operand is implicit.
Instruction Word Size
The 8085 instruction set is classified into the following three groups according to word size:
In the 8085, "byte" and "word" are synonymous because it is an 8-bit microprocessor. However, instructions are commonly referred to in terms of bytes rather than words.
ONE-BYTE INSTRUCTIONS
A 1-byte instruction includes the opcode and operand in the same byte. Operand(s) are internal register and are coded into the instruction.
For example:
|
Task |
Op code |
Operand |
Binary Code |
Hex Code |
|
Copy the contents of the accumulator in the register C. |
MOV |
C,A |
0100 1111 |
4FH |
|
Add the contents of register B to the contents of the accumulator. |
ADD |
B |
1000 0000 |
80H |
|
Invert (compliment) each bit in the accumulator. |
CMA |
0010 1111 |
2FH |
These instructions are 1-byte instructions performing three different tasks. In the first instruction, both operand registers are specified. In the second instruction, the operand B is specified and the accumulator is assumed. Similarly, in the third instruction, the accumulator is assumed to be the implicit operand. These instructions are stored in 8-bit binary format in memory; each requires one memory location.
MOV rd, rs
rd <-- rs copies contents of rs into rd.
Coded as 01 ddd sss where ddd is a code for one of the 7 general registers which is the destination of the data, sss is the code of the source register.
Example: MOV A,B
Coded as 01111000 = 78H = 170 octal (octal was used extensively in instruction design of such processors).
ADD r
A <-- A + r
TWO-BYTE INSTRUCTIONS
In a two-byte instruction, the first byte specifies the operation code and the second byte specifies the operand. Source operand is a data byte immediately following the opcode. For example:
|
Task |
Opcode |
Operand |
Binary Code |
Hex Code |
|
| Load an 8-bit data byte in the accumulator. |
MVI |
A, Data |
3E Data |
First Byte Second Byte |
Assume that the data byte is 32H. The assembly language instruction is written as
|
Mnemonics |
Hex code |
|
MVI A, 32H |
3E 32H |
The instruction would require two memory locations to store in memory.
MVI r,data
r <-- data
Example: MVI A,30H coded as 3EH 30H as two contiguous bytes. This is an example of immediate addressing.
ADI data
A <-- A + data
OUT port
where port is an 8-bit device address. (Port) <-- A. Since the byte is not the data but points directly to where it is located this is called direct addressing.
THREE-BYTE INSTRUCTIONS
In a three-byte instruction, the first byte specifies the opcode, and the following two bytes specify the 16-bit address. Note that the second byte is the low-order address and the third byte is the high-order address.
opcode + data byte + data byte
For example:
|
Task |
Opcode |
Operand |
Binary code |
Hex Code |
|
| Transfer the program sequence to the memory location 2085H. |
JMP |
2085H |
C3 85 20 |
First byte Second Byte Third Byte |
This instruction would require three memory locations to store in memory.
Three byte instructions - opcode + data byte + data byte
LXI rp, data16
rp is one of the pairs of registers BC, DE, HL used as 16-bit registers. The two data bytes are 16-bit data in L H order of significance.
rp <-- data16
Example:
LXI H,0520H coded as 21H 20H 50H in three bytes. This is also immediate addressing.
LDA addr
A <-- (addr) Addr is a 16-bit address in L H order. Example: LDA 2134H coded as 3AH 34H 21H. This is also an example of direct addressing.
This tutorial is one of a series designed to summarise the main features of a microprocessor CPU family so that engineers familiar with the general principles of embedded microprocessor development can rapidly get to know the 8085 family.
The 8085 was one of the first (1978) of the 8 bit Microprocessors where all the processing elements for a computer were contained on a single chip. It was used to spearhead the home desktop computer revolution running the CP/M operating system and WordStar, one of the original word processor applications, was developed for it.
Based on the 8080, the 8085's instruction set was almost identical but the major changes were that the electronics required to design an 8085 system were much simpler (one rather than 3 power supplies and internal clock and bus logic).
The team that designed the Intel 8080 had by then moved to Zilog where they went on to develop the Z80.
The Z80's instruction set is a strict superset of the 8085's and compatibility is sufficiently good that code in a ROM from an 8085 will directly operate on a Z80 machine, although the electronic details of how devices interface to the CPU are different.
The 8085 and Z80 are typical of that generation of 8 bit Microprocessors which were able to put all the processing unit onto one chip but still requiring surrounding supporting chips to create a complete system. By contrast the modern Microcontrollers such as the 8051 include these components, such as interrupt handlers UARTs and timers and with on chip ROM/Flash and RAM can act as a single chip system.
The 8085 family can address 64K bytes of memory which is used for both code and data space.
Memory is accessed via 20 pins. 8 address high pins and 8 pins that are used both for the 8 address low signals during the address setup phase and for the 8 data signals during the data transfer phase. 4 pins are used for control.
A READY input line allows memory or I/O access to slow down the data transfer. This allows slow memory or I/O hardware to be easily interfaced. And a HOLD line allows peripheral hardware to take over the memory bus allowing DMA transfers to be implemented.
The lower 8 of the16 address bus memory along with I/O and READ or WRITE control signals allow 512 I/O addresses to be referenced using the IN and OUT instructions. Two lines SID and SOD can be used to generate serial IN and OUT signals under direct software control (so called "bit banging" or "software UART" as the software has to be timed to turn each bit of the serial stream on and off).
You may also interface your I/O devices to the address bus by memory mapping them into addresses on the multiplexed address and data bus.
The 8085 has an 8 bit Accumulator and six 8 bit secondary Registers (B, C, D, E, H, L) that can also be grouped as three 16 bit Register pairs. One of these Register pairs (HL) is used by some memory reference instructions as a pointer.
Memory addressing is simple. A 16 bit address is either built into the instruction, or taken from the HL Register.
The instruction set is simple and uniform making it easy to learn. The OPCODES are all 8 bits long and these may contain Register fields and the OPCODE may be followed by an 8 or 16 bit immediate value or a 16 bit address.
OPCODE REG
<-------------------------- Byte --------------------->
OPCODE X X X
<------------------------- Byte ---------------------> <------------ 8 or 16 ----------->
The contents of all Registers including the Accumulator and the memory location pointed to by (HL) may be incremented, decremented or loaded with an immediate value. Similarly all combinations of Register, Accumulator and Memory pointed to by (HL) may be moved to another Register or the Accumulator or Memory pointed to by (HL). The following arithmetic operations may take place between any Register, Memory pointed to by (HL) or an immediate value as source and the Accumulator as destination - ADD, SUB, AND, OR, XOR and Compare.
The Register pairs can be incremented or decrement as a 16 bit value, or a 16 bit immediate value may be added to the HL pair which make 64K address manipulation easy.
There are Rotate operations via the Carry flag but no specific bit handling instructions.
There is a 16 bit stack pointer.
Jumps, Calls and returns all have conditional versions (ie Jump on carry set) and all jumps are to absolute 16 bit addresses. The Register pairs may be pushed to or popped from the stack.
The basic 8085 provides four interrupt lines which are hardware vectored to dedicated locations. If this is not adequate then the following mechanism can be used.... An interrupt signal is acknowledged by the 8085 and external interrupting logic can then send an instruction op code (usually RESET or CALL plus a vector address - but to implement a fast event counter it could be to INC a dedicated Register ).
Although now (2007) no one is likely to start a design with the 8085 it is instructive to give figures for power consumption and speed of execution that can be compared with those given in other tutorials in this series.
The N-Channel 8085A consumes 170mA although it requires at least two other chips (8156 & 8355) to make a complete system that then consumes ~530mA
The fastest instructions such as Reg to Reg MOV take 4 clock periods, instructions that address memory such as Memory INC , JUMP to address or PUSH take 10 clock periods and the longest instructions are the CALL variants which take 18 clock periods. With a 3MHz clock the 8085A instructions therefore take from 1.3 µSec to 5.75 µSec.
The 8085 requires external chips providing clock, interrupt, timer, I/O, Code ROM and data RAM as well as a program to be operational. The major advantage of using an In-Circuit Emulator (ICE) was that its internal hardware could be used in place of any or all of these parts during the boards development making it simple to isolate the problem component. If an ICE was unavailable, then ROM emulation was commonly used to speed up program development significantly over using EEPROMs.
Intel provided an Assembler and, at a price, PL/M, PASCAL, FORTRAN, Basic and a Real Time Executive RMX-80. Assemblers and a C Compiler are still available.
To summarise - this CPU was the basis of many of the board based systems developed during the 80s. It was easy to program in Assembler and (for its time) parts costs were reasonable. However Development Systems were expensive, High Level languages were inefficient and experienced Designers and Programmers were as rare as hens teeth.
The History of the Microcomputer - Invention and Evolution for details of how the Intel 8 and 16 bit ranges of CPUs evolved.
For details of the tools available to support the 8085 visit our 8085 products support page.
If you have found this tutorial useful you might also be interested in our tutorials on
Embedding TCP/IP, CAN and USB or on other microprocessor and microcontroller families.
If so you can find them at Embedded Tutorials
آخرین مهلت تحویل تمارین فصل 1و2 ، گروه برق_الکترونیک پنج شنبه 20/1/88 ساعت 9:30_11 کلاس 3 و مخابرات و کامپیوتر ، فصل 1و2 شنبه 22/1/88 ساعت 11_12:30 کلاس 3 می باشد و پس از تاریخ مقرر تمرین تحویل گرفته نمی شود مگر با امضا برگه حل تمرین توسط استاد مربوطه.
دوستان جهت دیدن نمونه سوالات و مطالب فصل های گذشته به قسمت نوشته های پیشین مراجعه و با کلیک بر روی تاریخ مورد نظرمیتوانند نمونه سوالات و مطالب مربوط به همان هفته را مشاهده نمایند.