R
RAM
Random Access Memory - A type of memory that can be written to and read from in a nonlinear (random) manner. When an application is opened. it is transferred from the hard drive to RAM where it is more readily accessible. RAM enhances system performance because it can process requests from the CPU more quickly than the hard drive. The kind of RAM used in main memory on most computers is Dynamic RAM (DRAM). DRAM stores data as electronic signals. These signals must be constantly refreshed to keep them from dissipating. The more RAM your computer has, the more data it can store at one time and subsequently the more efficiently your computer will operate. The data held in RAM is lost when the computer is turned off. The term random derives from the fact that the CPU can retrieve data from any individual location, or address, within RAM.
Ramp
A period of time in the oven when the temperature goes up.
Random failure region
The portion of the bathtub curve that represents the useful portion of device life.
Range
The difference between the smallest and largest values in a set of data. This is the simplest measure of variation.
RAS
Row-Address-Strobe: the signal that tells the DRAM to accept the given address as a row-address. Used with CAS and a column-address to select a bit within the DRAM.
RDRAM
Rambus DRAM is an evolutionary type of DRAM that uses a 16-18 bit data path and is designed to operate with FSB speed of 800 MHz producing a burst transfer rate of 1.6 gigahertz. Rambus DRAM technology is a system-wide, chip-to-chip interface design that allows data to pass through a simplified bus. Rambus uses a unique RSL (Rambus Signaling Logic) technology. Rambus is available in two flavors: RDRAM and Concurrent RDRAM. The third line extension, Direct RDRAM, was developed in stages and went into production in 1999. In late 1996, Rambus agreed to a development and license contract with Intel that lead to Intel's i820 and i840 chip sets supporting Rambus memory being released in 1999.
Read time
The amount of time required for the output data to become valid once the read and address inputs have been enabled; generally called access time.
Read-restore
A mode of operation used in core memory systems.
Read/write memory
A generic term for Random Access Memories.
Refresh
An electrical process used to maintain data stored in DRAM. The process of refreshing electrical cells on a DRAM component is similar to that of recharging batteries. Different DRAM components call for different refresh methods.
Refresh rate
This is a count of the number of rows (in thousands) refreshed at a time in a refresh cycle. Common refresh rates are 1K, 2K, and 4K. DRAM stores data as a series of electron charges in individual cells. This data must be constantly recharged or 'refreshed' to keep the data from dissipating. The refresh rate refers to the size of the data that must be recharged, and is typically expressed in kilobytes (~1,000 bytes). Two common refresh rates are 2K and 4K, with 2K being the faster rate.
Registered memory
Registers delay memory information for one clock cycle to ensure all communication from the chipset is collected by the clock edge, providing a controlled delay on heavily loaded memories.
Relative address
An identifier that indicates the position of a memory location in a computer routine relative to the base address as opposed to the memory location's absolute address.
Release time
The amount of time data must remain stable after a device or circuit has been clocked; also called 'hold time.'
Resist
A material that prevents etching or plating of the area it covers; also called photoresist.
RIMM
Rambus Inline Memory Modules used for RAMBUS DRAM. A form of chip packaging that is similar to DIMMs using Direct Rambus DRAM memory subsystems.
RISC
Reduced Instruction Set Computing. The design methodology is usually associated with microprocessors. RISC chips use simpler instructions, or commands, than CISC chips. However, they need to use more steps to perform many functions that CISC chips perform in one step. SPARC and MIPS chips are based on RISC.
Rise time
The amount of time required for a signal level change to increase from ten percent to ninety percent of its final specified value.
RMA
Returned Material Authorization; required if a customer desires to return products. Also refers to parts that have been returned from a customer.
ROM
Read Only Memory - A form of random access memory that can only be read from, not written to. Most systems use ROM to store the instructions a computer needs during the startup process.
Row
Part of the RAM array; a bit can be stored where a column and a row intersect.
Row/columns
Describes how many rows are on a wafer map in the X direction. (X = left to right. Y = top to bottom).
RPL
An acronym to represent RS/1 Programming Language. RPLs are functions or procedures written in RS/1's built in programming language. These RPLs are used to automate tasks and analyses.
RW
Read/Write memory.
Scribe
A marking on a wafer that identifies the wafer and the lot it came from. The scribe is located on the front of the wafer, opposite the major flat.
SDRAM
Synchronous Dynamic Random-Access Memory. A DRAM technology that uses a clock to synchronize signal input and output on a memory chip. The clock is coordinated with the CPU clock so the timing of the memory chips and the timing of the CPU are "in synch." The synchronization eliminates time delays and allows for fast consecutive read and write capability, thereby increasing the overall performance of the computer. SDRAM has two separate memory banks that operate simultaneously, while one bank prepares for access, the other is being accessed. SDRAM allows the CPU to access memory approximately 25 percent faster than
Secondary Cache
Cache that is second closest to the processor; typically located on the system board. Also referred to as Level 2 cache and external cache.
Self Refresh
A memory technology that enables DRAM to refresh on its own-independent of the CPU or external refresh circuitry. This technology is built into the DRAM chip itself and reduces power consumption dramatically. It is commonly used in notebook and laptop computers.
SER
Soft Error Rate. An error caused by temporary disruption of memory cell.
Serial Presence Detect (SPD)
Serial Presence Detect. An enhanced presence detect that uses an EEPROM to store modules timings, configuration, and the manufacturer's data.
Semiconductor
An element, such as silicon, that has intermediate in electrical conductivity between conductors and insulators, which conduction takes place by means of holes and electrons.
Sense amp
The sense amp acts as a distributor of current on the die.
Sense amplifier
A device or circuit capable of sensing very low voltages and amplifying them to some higher voltage level.
SGRAM
Syncronous Graphics RAM. A single port DRAM designed for graphics hardware that require high speed throughput such as 3-D rendering and full-motion video.
Shrink
A reduction in die (chip) size. A reduction in the size of the circuit design resulting in smaller die sizes that increases the number of possible die per wafer.
SIM
Single In-line Module. Same as SIP except with a connector edge instead of leads.
SIMM
Single In-line Memory Module - a high-density DRAM package alternative consisting of several components connected to a single printed circuit board. A small PCB designed to mount in a socket on a larger PCB providing a large memory upgrade in a small space. This board provides the connection between multiple memory chips and the computer system. SIMMS come in various pin configurations, the most common type being: 30 pin and 72 pin. A 30 pin SIMM has a row of 30 tin or gold pins long the bottom of the module which determine the amount of data the module can handle. These pins connect to only one memory chip as opposed to DIMMs which can connect to multiple chips.
SIMM socket
An interconnect component mounted on the system board, or motherboard, designed to hold a single SIMM.
SIP
Single In line Package. A component or module that has one row of leads along one side. Many resistors come in SIP form.
SLDRAM
Synchronous Link Dynamic Random Access Memory. SLDRAM is the next evolution of SDRAM using a multiplexed command bus allowing fewer pins to increase bandwidth and allow higher FSB speeds.
SODIMM
Small Outline Dual Inline Memory Module. Smaller and thinner than standard DIMMs, SODIMMs are typically used in laptop computers and mobile computing devices. An enhanced version of a standard DIMM. The small outline DIMM is about half the length of a typical 72-pin SIMM. SO DIMMs come in a variety of pin sizes and can be installed either singly to support 32-bit systems, or in pairs to support 64-bit systems.
Soft error
An error caused by a temporary disruption of the memory cell.
Soft error fail
A part with a temporary, single-bit failure during the soft error test.
SORIMM
Small Outline Rambus Inline Memory Module. SORIMMs have a smaller profile that standard RIMMs and are used in laptop computers and systems that have strict size requirements.
SOJ
Small Outline J-lead package. A rectangular package with leads sticking out of the side of the package. The leads are formed in a J-bend profile, bending underneath and towards the bottom of the package.
SPC
Statistical Process Control. The use of statistics to determine uniformity around a target value.
SPD (Serial Presence Detect)
An enhanced presence detect that uses an EEPROM to store manufacturer data.
Speed
The time it takes the RAM to put information into its memory or get information out of its memory. It is measured from the time that an address and proper control signals are given, until the information is stored or placed in the device's output(s).
Speed grade
Our coding for the speed that the stored information in the part can be retrieved by a computer. For DRAMs, a -5 is 50 nanoseconds, a -6 is 60 nanoseconds, a -7 is 70 nanoseconds, etc. For SRAMs, a -10 is 10 nanoseconds, etc.
SPHS
An operation found in coat and develop programs that stands for spin high speed.
Spike
The sudden drastic portion of a pulse that significantly exceeds its average amplitude. Standard deviation A measure of variation for a particular process or product characteristic. This is often abbreviated as 'STD DEV' or 'STD'.
SRA
Standard Readability Assessment.
SRAM
(Static Random Access Memory) An integrated circuit similar to a DRAM (Dynamic Random Access Memory) with the exception that the memory does not need to be refreshed. SRAM is faster and more expensive than DRAM and is generally used for speed-critical areas of the computer such as cache memory.
Starting address
Smallest or lowest address that a memory system will respond to.
Static ram
Unlike volatile memory, static memory retains its contents even when the main current is turned off. The trickle of electricity from a battery is enough to refresh it.
Storage Device
A medium designed to hold data, such as Floppy Diskette, Harrd Disk Drive or CD-ROM.
Strobe
An input that allows parallel data to be entered a synchronously.
Substrate
The actual structural material on which semiconductor devices are fabricated, whether passive or active. The term applies to any supportive material, such as the materials used in the fabrication of printed circuits.
Surface-mount package
A J-leaded or Gullwing package or BGA that can be mounted directly on the surface of P.C. Boards (as opposed to through-hole packages).
Switches menu
The menu in BIOS containing user-configurable options for a PC's hardware configuration.
Synchronous Cache
A kind of L2 cache that is synchronized with the CPU. This eliminates the lag time created while the CPU waits for cache memory to fulfill its requests. Synchronous cache is typically 3 to 5 percent faster than asynchronous cache, and is a full 20 percent faster than standard DRAM. See also Asynchronous Cache.
TAG
The subset of the CPU address bits used to compare the tag bits of the cache directory to the main memory address being accessed. Tag memory acts as an index for the information stored in L2 cache.
Tag RAM
Cache is physically divided into two sections. The Tag RAM section stores the Tag address of the location of the data in cache. This section is smaller than the Data RAM section, which stores the actual data or instruction.
TBD
To Be Determined. Used on quotes in reference to shipping dates.
TCAC
A measurement of the speed or how fast the part is; it is the time it takes to get a bit of information out of the part after CAS comes down.
TCE
Thermal Coefficient of Expansion. A constant that describes the changes in linear dimensions with respect to temperature for a device or material.
TG
A code for TSOP (see TSOP). A package-type code.
TSOP
Thin Small Outline Package. It is thinner and slightly smaller than an SOJ and with gullwing-shaped leads. A thin, rectangular package with leads sticking out the sides of the package. TSOP DRAM mounts directly on the surface of the printed circuit board. The advantage of the TSOP package is that it is one-third the thickness of an SOJ package. TSOP components are commonly used in small outline DIMM and credit card memory applications.
Test
An electrical process every product goes through which tests the parts for parametric, speed, and functional failures.
Transistor
A semiconductor device that uses a stream of charge carriers to produce active electronic effects.
Trace Layout
The process of creating a printed circuit on a printed circuit board (PCB).
Type
This number (x8, x9, x32, x36, x64, x72, x80) refers to the bit depth of a module, or to the size of the data path used to access the memory.
Unbuffered memory
This is where the chipset controller deals directly with the memory. There is nothing between the chipset and the memory as they communicate.
UM
Micron (or micrometer). A unit of length equal to one millionth of a meter.
US
Microsecond: One millionth of a second.
Vcc
Collector Common Voltage.
Volatile Memory
Memory that loses its contents when the power is turned off. A computer's main memory, made up of dynamic RAM or static RAM chips, loses its content immediately upon loss of power. Contrast ROM, which is non-volatile memory.
VRAM
Video RAM. DRAM with an on-board serial register/serial access memory designed for video applications. VRAM has two separate data ports. One is dedicated to updating the image on the screen while the other one is used for changing the image data stored in memory. This "dual-ported" design gives higher performance than DRAM which cannot read and write simultaneously but is more expensive.
Vss
Vss is the abbreviation for the ground on a connection. (Like the ground wire on a battery.)
Variable
A condition, transaction, or event that changes or may be changed as a result of processing additional data through a system.
WE
Write-Enable; WE must be pulsed low when data is written to the chip.
Write time
Time expended from the moment data is entered for storage to the time it is actually stored.
Zero-page addressing
An addressing mode in which the address is given as an unsigned binary number that specifies one of the memory locations between 0 and 256(decimal).
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