D
Damping
In resonant circuits, the decay of oscillations due to the resistance in the circuit.
Data out
The signal line that carries the data read from the RAM (Random Access Memory).
Date code
A marking on all PCB and DRAM components indicating the manufacturing date of the product.
DDR
(Double Data Rate) or SDRAM II--The next generation of the current SDRAM. DDR finds its foundations on the same design core of SDRAM, yet adds advances to enhance its speed capabilities. As a result, DDR allows data to be sent on both the rising and falling edges of clock cycles in a data burst, delivering twice the bandwidth of standard SDRAMS. DDR essentially doubles the memory speed from SDRAMs without increasing the clock frequency.
Die
An individual rectangular pattern on a wafer that contains circuitry to perform a specific function. The internal circuitry is made of thousands of tiny electronic parts. 'Die' refers to a semiconductor component or part that has not yet been packaged (also known as 'IC' (Integrated Circuit) or 'chip').
Die pick-up tool
The bondhead tool on the machine that picks up the die from the precisor and places it on the leadframe.
Die size
The physical measurements of the die.
Dielectric
A material that conducts no current when it has voltage applied to it. Two dielectrics used in semiconductor processing are silicon dioxide and silicon nitride.
Dielectric deposition
A layer of deposited oxide used to isolate metal 1 from metal 2 on double-level metal processes. This must be done in such a way to prevent hillock formation on level 1.
Diffusion
The intermingling of molecules of two or more substances. When high temperature processes are done in diffusion tubes, the high temperature accelerates diffusion. Typical diffusion furnace temperature is 950 degrees Centigrade, or 1742 degrees Fahrenheit.
DIMM
Dual Inline Memory Module. A printed circuit board with gold or tin/lead contacts and memory devices. A DIMM is similar to a SIMM, but with this primary difference: unlike the leads on either side of a SIMM, which are "tied together" electrically, the leads on either side of a DIMM are electrically independent, ie actually separate circuits which allows for wider and faster data transfer.
DIP
(Dual In-line Package) A form of DRAM component packaging. DIPs can be installed either in sockets or permanently soldered into holes extending into the surface of the printed circuit board. The DIP package was extremely popular when it was common for memory to be installed directly on a computer's motherboard.
DQM
Data mask signal used by SDRAMs to provide byte masking during write operations. There is one DQM signal for every 8 bits of data width.
Direct address
A computer memory address that is included as part of the instruction.
Direct memory access
A computer feature that allows peripheral systems to access the memory for both read and write operations without affecting the state of the computer's central processor.
Distributed processing
Systems using intelligent input/output controllers and direct - memory - access control to free the CPU of the details of block transfers.
Doping
The introduction of an element that alters the conductivity of a semiconductor. Adding boron to silicon will create a P-type (more positive) material, while adding phosphorus or arsenic to silicon will create N-type (more negative) material.
DRAM
(Dynamic Random Access Memory) DRAM is the most common type of memory and is "dynamic" because in order for the memory chip to retain data, it must be refreshed constantly ( a pulse of current through all of the memory cells every few milliseconds). If the cell is not refreshed, the data is lost. DRAM temporarily stores data in a cell composed of a capacitor and a transistor. Each cell contains a specified number of bits. These cells are accessed by row addresses and column addresses. (See also RAM and SRAM.)
DRDRAM
(Direct Rambus DRAM) A totally new RAM architecture, complete with bus mastering (the Rambus Channel Master) and a new pathway (the Rambus Channel) between memory devices (the Rambus Channel Slaves). A single Rambus Channel has the potential to reach 500MBp/s to 800Mb/s in burst mode; a 20-fold increase over DRAM.
Driver board
A printed circuit board that sends signals from the interface board of the oven to the DUT board and back to the interface board. Each oven slot has a corresponding driver board located in the back of the oven.
Dry pack
The process of preparing product for shipment in moisture vapor barrier bags. This process includes tubed or reeled product and a clay desiccant, and an HIC (Humidity Indicator Card), vacuum-sealed in a moisture vapor barrier bag.
DUT
Device Under Test. It is used interchangeably with UUT (Unit Under Test).
Dynamic
Type of RAM (Random Access Memory). To keep data in the D(ynamic)RAM memory, this data needs to be 'refreshed' (recharged). The electric charge fades out of a DRAM like air seeps out of a balloon. Because of this change, it is called Dynamic.
E2PROM
Electrically Erasable PROM.
EAROM
Electrically Alterable Read-Only Memory.
ECC
Error Correction Code. A method used to check the integrity of data stored in memory . ECC memory improves data integrity by detecting errors in memory and is more advanced than parity because it can detect both multiple-bit errors and single-bit errors (parity only detects single-bit errors). ECC is typically found in high-end PCs and file servers where data integrity is key. An ECC scheme capability is partially determined by the sophistication of the "systematic code" employed. The systematic code is like a reference table that the memory system uses to determine whether or not the memory has returned the correct data. Every time data is stored in memory, this code is responsible for the generation of check bits which are stored along with the data. When the contents of a memory location is referenced, the ECC memory logic uses the check bit information and the data itself to generate a series of "syndrome bits". If these syndrome bits are all zeros, then the data is valid and operation continues. If any bits are ones, then the data has an error and the ECC memory logic isolates the errors and reports them in the operating system. In the case of a correctable error, the ECC memory scheme can detect single and double bit errors and correct single bit errors.
A memory feature that allows for faster back to back accesses.
EDO Parity RAM
EDO Parity RAM offers the high performance of
(Extended Data Out) EDO RAM is similar to FPM memory, a form of DRAM technology that shortens the read cycle between memory and CPU. but provides improved performance by keeping available data longer in memory. It eliminates much of the wait time by allowing the processor to access data during the refresh cycle. In other words, the computer can load data as it is searching for new information.
EDRAM
(Enhanced Dynamic Random Access Memory)--a form of DRAM that boosts performance by placing a small complement of static RAM (SRAM) in each DRAM chip and using the SRAM as a cache. Also known as cached DRAM, or CDRAM.
EEPLD
Electrically Erasable Programmable Logic Device. A CMOS PLD made by using EEPROM technology. It can be erased and reprogrammed.
EEPROM
Electrically Erasable, Programmable, Read-Only Memory chip. EEPROMs differ from DRAMs in that the memory stays in even if electrical power is lost. Also, the memory can be erased and reprogrammed.
Electrostatic discharge (ESD)
The dissipation of electricity. ESD can easily destroy semiconductor products.
EOB
End Of Buffer.
EPROM
Electrically Erasable, PROgrammable, Read-Only Memory chip. EEPROMs differ from DRAMs in that the memory stays in even if electrical power is lost. Also, the memory can be erased and reprogrammed.
EOS
(ECC on SIMM) A data-integrity checking technology designed by IBM that features ECC data-integrity checking built onto a SIMM.
EPROM
Erasable Programmable Read Only Memory
Encapsulation
The process of applying a cured-plastic protective housing to components. A mold compound. An Assembly step.
Etch
A process using a chemical bath (wet etch) or a plasma (dry etch) that removes unwanted substances from the wafer surface.
Ethernet
A local area network allowing several computers to transfer data on a communications cable.
Even Parity
Even parity and odd parity are two different parity protocols used to check the integrity of data stored in memory. A memory manufacturer can use either protocol in a memory product. Even parity adds an additional bit to every byte of data to make the total number of 1's in the segment even. When the byte passes to the CPU, the parity circuit checks the byte to be sure it is still even. If it is, the data is considered to be valid and the parity bit is removed from the byte. If instead it registers as odd, it is considered to be invalid and a parity error is generated.
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